EurekAlert June 11, 2022
Researchers in Japan have developed a proof-of-concept 3D stacked memory cell based on ferroelectric and antiferroelectric FETs with atomic-layer-deposited oxide semiconductor channel. The vertical device structure increases information density and reduces operation energy needs. Hafnium oxide and indium oxide layers were deposited in a vertical trench structure. By using antiferroelectric instead of ferroelectric, they found that only a tiny net charge was required to erase data, which leads to more efficient write operations. This work may allow for new even smaller and more eco-friendly data-storage memory. The team experimented with various thicknesses for the indium oxide layer. They found that optimizing this parameter can lead to significant increases in performance. The researchers also used first-principles computer simulations to plot the most stable surface states. According to the researchers it has the potential to greatly improve the field of non-volatile memory…read more.
Researchers at The University of Tokyo create vertical field-effect transistors that can be used to store information in a 3D array… CREDIT: Institute of Industrial Science, The University of Tokyo