New method gives robust transistors

Science Daily  January 7, 2020 The combination of gallium nitride and silicon carbide ensures that the circuits are suitable for applications in which high powers are needed. However, the fit at the surface end up mismatched with each other, which leads to failure of the transistor. The problem was addressed by placing aluminium nitride between the two layers. An international team of researchers (Sweden, France) discovered a previously unknown epitaxial growth mechanism that they have named “transmorphic epitaxial growth.” It causes the strain between the different layers to be gradually absorbed across a couple of layers of atoms allowing grow […]

WPI researchers discover vulnerabilities affecting billions of computer chips

Eurekalert  November 12, 2019 Researchers at Worcester Polytechnic Institute discovered two vulnerabilities located in trusted platform modules, which are specialized, tamper-resistant chips that computer manufacturers have been deploying in nearly all laptops, smart phones, and tablets for the past 10 years. One of them was found in Intel’s TPM firmware, and another in  STMicroelectronics’ TPM. The vulnerabilities have been addressed. They would have allowed hackers to employ timing side-channel attacks to steal cryptographic keys that are supposed to remain safely inside the chips. The recovered keys could be used to compromise a computer’s operating system, forge digital signatures on documents, […]

‘Electroadhesive’ stamp picks up and puts down microscopic structures

Nanowerk  October 11, 2019 Mechanical pick-and-place technologies cannot manipulate smaller objects whose surface forces dominate over gravity, and emerging microtransfer printing methods require multidirectional motion, heating, and/or chemical bonding to switch adhesion. A team of researchers in the US (MIT, University of Pennsylvania) has developed soft nanocomposite electroadhesives (SNEs), comprising sparse forests of dielectric-coated carbon nanotubes (CNTs), which have electrostatically switchable dry adhesion. SNEs exhibit 40-fold lower nominal dry adhesion than typical solids, yet their adhesion is increased >100-fold by applying 30 V to the CNTs. They characterized the scaling of adhesion with surface morphology, dielectric thickness, and applied voltage […]

‘Tsunami’ on a silicon chip: A world first for light waves

Science Daily  July 3, 2019 An international team of researchers (Singapore, Australia) has shown CMOS‐compatible, on‐chip Bragg solitons, with a soliton‐effect pulse compression with a factor of × 5.7, along with time‐resolved measurements of soliton fission on a CMOS‐compatible photonic circuit platform. These observations are enabled by the combination of a unique cladding‐modulated Bragg grating design and the high nonlinearity and negligible nonlinear loss of compositionally engineered ultra‐silicon‐rich nitride (USRN: Si7N3). Manipulating solitons on-chip could potentially allow for the speed up of photonic communications devices and infrastructure…read more. TECHNICAL ARTICLE 

Innovative approach to controlling magnetism opens route to ultra-low-power microchips

Phys.com  November 12, 2018 A team of researchers in the US (MIT, Brookhaven National Laboratory) has developed a device that consists of several thin layers, including a layer of cobalt where the magnetic changes take place, sandwiched between layers of a metal such as palladium or platinum, an overlay of gadolinium oxide, and a gold layer to connect to the driving electrical voltage. To change magnetic properties, they used hydrogen ions which can zip in and out very easily, making the new system much faster. Magnetism gets switched on with just a brief application of voltage and then stays put. […]

Through-Silicon Transistors Could Make Stacking Chips Smarter

IEEE Spectrum  October 2, 2018 Through-silicon vias (TSVs) are the standard way to stack chips. To make TSV smart chip, researchers in Germany have designed through-silicon via field effect transistor (TSVFET) in which the drain and source were at the top and bottom of the hole. When voltage was applied to the gate, current flowed from top to bottom through the area surrounding the hole. Just by applying a voltage or taking it off, it is possible to activate a chip or deactivate it completely. TSVFETs can be linked up to form elementary circuits. By adding some control electronics, the […]

Heat-conducting crystals could help computer chips keep their cool

Science Daily  July 5, 2018 A team of researchers in the US (UT Dallas, University of Illinois, University of Houston) has found high thermal conductivity of 1000 ± 90 W/m/K at room temperature in cubic boron arsenide grown through modified chemical vapor transport technique. The thermal conductivity is a factor of 3 higher than that of silicon carbide and surpassed only by diamond and the basal plane value of graphite. Boron arsenide could be a potential revolutionary thermal management material… read more. TECHNICAL ARTICLE

Computing: Design for magnetoelectric device may improve memory

Science Daily   May 4, 2018 Existing devices require large magnetic and electric fields to switch the magnetic properties of the devices. Researchers at the University of Minnesota used the magnetic material to surround chromia (Cr2O3) providing a magnetic field through quantum mechanical coupling to Cr magnetic moments, while allowing devices to be arranged in a way that blocks stray magnetic fields from affecting nearby devices. An element to read out the state of the device is placed on top of the device. This could potentially pack more memory into a smaller space… read more. Open Access TECHNICAL ARTICLE 

3D Nanoprinting facilitates communication with light

Nanowerk   April 20, 2018 Researchers in Germany have developed a new solution for the coupling of optical microchips to each other or to optical fibers. They use tiny beam-shaping elements that are printed directly onto the facets of optical components by a high-precision 3D printing process. These elements can be produced with nearly any three-dimensional shape and enable low-loss coupling of various optical components with a high positioning tolerance. They produced beam-shaping elements of various designs and tested them on a variety of chip and fiber facets and reached coupling efficiencies of up to 88% between an indium phosphide laser […]

Integrating optical components into existing chip designs

Nanowerk   April 20, 2018 An international team of researchers (Belgium, USA – MIT, UC Berkeley, University of Colorado, Boston University, SUNY Albany, Switzerland) introduced photonics into bulk silicon CMOS chips using a layer of polycrystalline silicon deposited on silicon oxide islands fabricated alongside transistors. They implemented integrated high-speed optical transceivers in this platform that operate at ten gigabits per second, composed of millions of transistors, and arrayed on a single optical bus for wavelength division multiplexing. By decoupling the formation of photonic devices from that of transistors, this integration approach can achieve many of the goals of multi-chip solutions, but […]