Nanowerk April 28, 2023
The continued downscaling of silicon CMOS technology presents challenges for achieving the required low power consumption. While high mobility channel materials hold promise for improved device performance at low power levels, a material system which enables both high mobility n-FETs and p-FETs, that is compatible with Si technology and can be readily integrated into existing fabrication lines is required. An international team of researchers (Germany, France, UK) has developed high performance, vertical nanowire gate-all-around FETs based on the GeSn-material system grown on Si. While the p-FET transconductance was increased to 850 µS/µm by exploiting the small band gap of GeSn as source yielding high injection velocities, the mobility in n-FETs was increased 2.5-fold compared to a Ge reference device, by using GeSn as channel material. The researchers have demonstrated the potential of the material system for a future beyond Si CMOS logic and quantum computing applications via a GeSn inverter and steep switching at cryogenic temperatures, respectively… read more. Open Access TECHNICAL ARTICLE
Description of the GeSn CMOS concept. Credit: Communications Engineering volume 2, Article number: 7 (2023)Â